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Espressif Systems /ESP32 /SPI0 /SLAVE2

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Interpret as SLAVE2

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0SLV_RDSTA_DUMMY_CYCLELEN 0SLV_WRSTA_DUMMY_CYCLELEN 0SLV_RDBUF_DUMMY_CYCLELEN 0SLV_WRBUF_DUMMY_CYCLELEN

Fields

SLV_RDSTA_DUMMY_CYCLELEN

In the slave mode it is the length in spi_clk cycles of dummy phase for read-status operations. The register value shall be (cycle_num-1).
SLV_WRSTA_DUMMY_CYCLELEN

In the slave mode it is the length in spi_clk cycles of dummy phase for write-status operations. The register value shall be (cycle_num-1).
SLV_RDBUF_DUMMY_CYCLELEN

In the slave mode it is the length in spi_clk cycles of dummy phase for read-buffer operations. The register value shall be (cycle_num-1).
SLV_WRBUF_DUMMY_CYCLELEN

In the slave mode it is the length in spi_clk cycles of dummy phase for write-buffer operations. The register value shall be (cycle_num-1).

Links

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Register License

Copyright 2024 Espressif Systems (Shanghai) PTE LTD

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data